1/20 XC9303 series high efficiency, synchronous step-up & down dc / dc controller ics general description the XC9303 series is highly efficient, synchronous pwm, pwm/pfm switchable step-up & down dc/dc controller ics. a versatile, large output current and high efficiency, step-up/down dc/dc controller can be realized using only basic external components - transistors, coil, diode, capacitors, and resistors for detecting voltages. high efficiency is obtained through the use of a synchronous rectification topology. the operation of the XC9303 series can be switched between pwm and pwm/pfm (auto switching) externally using the pwm pin. in pwm/pfm mode, the xc 9303 automatically switches from pwm to pfm during light loads and high efficiencies can be achieved over a wide range of output loads conditions. output noise can be easily reduced with pwm control since the frequency is fixed. synchr onous rectification control can be switched to non-synchronous by using external signals (mode pin). high efficiency can be regulated at heavy loads when synchronous operation. the XC9303 has a 0.9v (2.0%) internal voltage supply and using externally connected components, output voltage can be set freely between 2.0v to 6.0v. with an internal 300khz switching frequency smaller external components can be used. soft-start time is internally set to 10msec and offers protection against in-rush currents when the power is switched on and prevents voltage overshoot. typical application circuit typical performance characteristics applications pdas palmtop computers portable audios various power supplies features input voltage range : 2.0v ~ 10v output voltage range : 2.0v ~ 6.0v : can be set freely with 0.9v (2.0%) of reference voltage supply and external components. oscillation frequency : 300khz (15%) output current : more than 800ma (v in = 4.2v, v out =3.3v) stand-by function : 3.0 a (max.) synchronous step-up & down dc / dc controller maximum duty cycle : 78% (typ.) pwm, pwm/pfm switching control synchronous rectification control high efficiency : 84% (typ.) soft-start time : 10ms (internally set) package : msop-8a <XC9303b093k output= 3.3v> efficiency vs. output current tr 2:n ch m osfet :c ph 3409 c in :47uf v in :2.0v~10v cl: 47ufx2 rfb :200 k cfb :62pf vout:3.3v tr3:n ch m osfet :c ph 3409 nc XC9303b093k(300khz, v out =3.3v) 0 10 20 30 40 50 60 70 80 90 100 0.1 1 10 100 1000 10000 output current i out (ma) efficiency effi (%) l=22uh(cdrh127/ld), cl=94uf(tantalum),sd:cms02 tr1:cph6315, tr2:cph3409, tr3:cph3409 vin=2.7v 4.2v pwm control pw m/pfm switching control etr0602_001
2/20 XC9303 series pin configuration pin assignment product classification ordering information 1 ext1 2 vdd 3 pw m fb 6 gnd 7 ext2 8 4 ce nc 5 msop-8a (top view) pin number pin name functions 1 ext 1 / external transistor drive pin 2 v dd supply voltage 3 pwm pwm/pfm switching pin 4 ce chip enable pin 5 nc no connection 6 fb output voltage monitor feedback pin 7 gnd ground 8 ext2 external transistor drive pin XC9303 ????? designator description symbol description type of dc/dc controller b : standard type output voltage 09 : fb voltage: 0.9v oscillation frequency 3 : 300khz package k : msop-8a r : embossed tape, standard feed devise orientation l : embossed tape, reverse feed
3/20 x c9303 series block diagram absolute maximum ratings ta = 2 5 parameter symbol ratings units v dd pin voltage v dd - 0.3 ~ 12.0 v fb pin voltage v fb - 0.3 ~ 12.0 v ce pin voltage v en - 0.3 ~ 12.0 v pwm pin voltage v pwm - 0.3 ~ 12.0 v mode pin voltage mode - 0.3 ~ 12.0 v ext1, 2 pin voltage v ext - 0.3 ~ v dd + 0.3 v ext1, 2 pin current i ext 100 ma power dissipation pd 150 mw operating temperature range topr - 40 ~ + 85 storage temperature range tstg - 55 ~ +125 + - fb ext1 / gnd ext2 rampwave gene rator, osc error amp pwm compa rator ce pwm ce to i nterna l ci rcui t synchronou s vin + - pwm/pfm controller vref=0.9v with soft-start, ce blank logic
4/20 XC9303 series parameter symbol conditions min. typ. max. units circuit supply voltage v dd 2.0 - 10.0 v maximum input voltage v in 10.0 - - v output voltage range (*1) v outset v in R 2.0v, i out =1ma v out 2.0 - 6.0 v supply current 1 i dd1 fb = 0v - 90 170 a supply current 2 i dd2 fb = 1.0v - 55 110 a stand-by current i stb same as i dd1 , ce = 0v - - 3.0 a oscillation frequency fosc same as i dd1 255 300 345 khz fb voltage v fb v in =3.0v, i out =10ma 0.882 0.900 0.918 v minimum operation voltage v inmin - - 2.0 v maximum duty ratio maxdty same as i dd1 72 78 88 % minimum duty ratio mindty same as i dd2 - - 0 % pfm duty ratio pfmdty no load, v pwm =0v 22 30 38 % efficiency (*2) effi i out1 =100ma (*3) - 84 - % soft-start time tss v out 0.95v, ce=0v 0.65v 5.0 10.0 20.0 ms ext1 "high" on resistance r extbh1 ce = 0, ext1= v dd - 0.4v - 26 37 ext1 "low" on resistance r extbl1 fb = 0v, ext1 = 0.4v - 19 30 ext2 "high" on resistance r extbh2 ext2 = v dd - 0.4v - 23 31 ext2 "low" on resistance r extbl2 ce = 0v, ext2 = v dd - 0.4v - 19 30 pwm "high" voltage v pwmh no load 0.65 - - v pwm "low" voltage v pwml no load - - 0.20 v ce "high" voltage v ceh fb = 0v 0.65 - - v ce "low" voltage v cel fb = 0v - - 0.2 v ce "high" current i ceh - - 0.5 a ce "low" current i cel ce = 0v - - - 0.5 a pwm "high" current i pwmh - - 0.5 a pwm "low" current i pwml pwm=0v - - - 0.5 a fb "high" current i fbh - - 0.50 a fb "low" current i fbl fb = 1.0v - - - 0.50 a electrical characteristics ( fosc = 300khz ) ta = 2 5 XC9303b093 note *1: please be careful not to exceed the breakdown voltage level of the external components. *2: effi={ [ (output voltage) x (output current) ] / [ (input voltage) x (input current) ] } x 100 *3: tr1: cph6315 (sanyo) tr2: cph3409 (sanyo) tr3: cph3409 (sanyo) sd: cms02 (toshiba) l: 22 h (cdrh127/ld, sumida) c l : 16v, 47 f x 2 (tantalum mce series, nichicemi) c in : 16v, 47 f ( tantalum mce series, nichicemi ) r fb1 : 200k r fb2 : 75k c fb : 62 p f
5/20 x c9303 series operational explanation the XC9303 series are synchronous step-up & down dc/dc converter controller ics with built-in high speed, low on resistance drivers. the error amplifier is designed to monitor the output voltage and it compares the feedback voltage (fb) with the reference voltage. in response to feedback of a voltage lower than the reference voltage, the output voltage of the error amp. decreases. this circuit generates the oscillation frequency, which in turn generates the source clock. the ramp wave generator generates a saw-tooth waveform based on outputs from the phase shift generator. the pwm comparator compares outputs from the error amp. and saw-tooth waveform. when the voltage from the error amp's output is low, the external switch will be set to on. this circuit generates pfm pulses. control can be switched between pwm control and pwm/pfm automatic switching control using external signals. the pwm/pfm automatic switching mode is selected when the voltage of the pwm pin is less than 0.2v, and the control switches between pwm and pfm automatically depending on the load. as the pfm circuit generates pulses based on outputs from the pwm comparator, shifting between modes occurs smoothly. pwm control mode is selected when the voltage of the pwm pin is more than 0.65v. noise is easily reduced with pwm control since the switching frequency is fixed. control suited to the application can easily be selected which is useful in audio applications, for example , where traditionally, efficiencies have been sacrificed during stand-by as a result of using pwm control (due to the noise problems associated with the pfm mode in stand-by). the synchronous, blank logic circuit is to prevent penetration of the transistor connected to ext1 and ext2. the reference voltage, vref (fb pin voltage)=0.9v, is adjusted and fixed by laser trimming (for output voltage settings, please refer to next page). to protect against inrush current, when the power is switched on, and also to protect against voltage overshoot, soft-start time is set internally to 10ms. it should be noted, however, that this circuit does not protect the load capacitor (c l ) from inrush current. with the vref voltage limited and depending upon the input to the error amps, the operation maintains a balance between the two inputs of the error amps and controls the ext pin's on time so that it doesn't increase more than is necessary. this function controls the operation and shutdown of the ic. when the voltage of the ce pin is 0.2v or less, the mode will be chip disable, the channel's operations will stop. the ext1 pin will be kept at a high level (the external p-ch mosfet will be off) and the ext2 pin will be kept at a low level (the external n-ch mosfet will be off). when ce pin is in a state of chip disable, current consumption will be no more than 3.0 a. when the ce pin's voltage is 0.65v or more, the mode will be chip enable and operations will recommence. with soft-start, 95% of the set output voltage will be reached within 10ms (typ.) from the moment of chip enable. |
